# Voltage to Frequency Conversion ADC

Since an analog to digital converter ends up producing a number, wouldn't it be convenient if we could simply count something and have that something proportional to the potential being measured? A voltage to frequency converter ADC does just that. A voltage is integrated until it reaches some pre-set threshold, at which point a comparator trips, doing 2 things:

1) short circuit the capacitor, resetting the integrator to zero.

2) produce a pulse that is counted.

Here' the circuit.

V to F converters integrate noise, and so are useful under circumstances similar to dual slope units. V to F ADCs are precise, accurate, simple, and inexpensive. The precision is directly proportional to the time over which counting occurs, and inversely proportional to the time required to integrate a single count.

If we count pulses for a fixed period of time, then we know how often the comparator tripped during that time. Suppose we want to display 1.000 for a 1 V input, and suppose we look at the input for 1.000 s. Then we'd want the comparator to trip 1000 times per second. Further, suppose the comparator is set up to trip at a potential of 5 V (chosen just so it's not the same as the input potential; in fact, this potential can be anything we like as long as we know it in advance). Then a 1 V input should integrate to 5 V in 1 ms. In the dual slope module, we explained how integrators work. From the argument there, the RC time constant of the integrator is set by V_{out} = - V_{in}T/(RC). Ignoring sign, 5 V = 1 V * 1 ms/RC.

RC = 1 ms/5 = 200 μs. For R = 1 kΩ, C = 0.2 μF. Changing the expected magnitude of the input voltage or the number of significant figures desired may mean a different integration time, R, or C value, but for a wide range of inputs the integrate, short, count, repeat cycle works well. The first very high resolution (up to 6 digits or ~ 20 bits) ADCs worked on this principle.

The non-idealities of a V to F converter are dependent on the design strategy. Let's start the simplest approach. Here, we do nothing to compensate for the time required to fully discharge the capacitor; the time while the capacitor is discharging called "dead time." The bigger the resistance of the switch used to short the capacitor, the longer the switch must be closed. Alternatively, if the switch isn't closed for long enough, there will be residual potential on the integrator, and the time to integrate to threshold will be reduced. In practice, if one knows how long the switch is closed, one knows how long the dead time is, and a correction factor may be computed.

**Example**. Suppose the integrator in a V to F converter is shorted for 1 μs every time the comparator "hits." In 1.0000 s, the V to F counts up 9997 counts, seemingly indicating 0.9997 V. However, that means that the integrator wasn't integrating for 9997 μs or 9.997 ms. Because the apparent count rate was 1 count every 1/9997 s or once per 0.1 ms, the counter missed integrating for nearly 100 counts. The corrected count is 9997 + 100 = 10097, giving a corrected output reading of 1.0097 V, about a 1% correction.

While correction factors are easier to account for in software than in hardware, many systems account for the dead time in hardware.

Is there a way to get rid of the dead time? Yes. We can integrate in one direction until we reach one threshold level, then integrate in the opposite sense until a second threshold (possibly zero, though usually a bit above zero to avoid noise in the zero level) is reached. We continue switching back and forth, with the error due to switching time typically small compared to dead time error. We get one count for each combined up/down cycle. One might think that needing two comparators would be expensive and complex. Fortunately, early in the era of integrated circuits, the 555 timer was fabricated. It goes "High" when an input voltage is 2/3 of a reference, then switches "Low" when the input to a second input drops to 1/3 of the same reference. The reference can be the power supply potential (cheap, simple, readily available) or a separate, carefully controlled reference (more precise). Here's the circuit:

A 555 timer can toggle reliably at at least 100 kHz, so 1 s integrations can have 5 significant figures. 10 s integrations? 6 significant figures, provided only that there's no drift in the values of R, C, V_{ref}, or the mean of V_{in} during this time.