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Dual Slope ADC

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Let's put the pieces together. What would a complete dual slope ADC look like inside? We'll leave out the details of the counter/controller. Dashed lines mean "control" (to throw a switch or convey a pulse). Solid lines carry analog potentials. The circuit is:

dualslope full circuit

The system works in 3 stages:

1) short the capacitor to set the integrator to 0.

2) integrate Vin for fixed time.

3) use either Vref or - Vref to drive the integrator back to zero, with the timer measuring the elapsed period until a "stop" pulse is received from the comparator observing the output of the integrator. The time than transfer Tdown to the display, where it is shown until the completion of the next 3 step cycle.

In the days when analog integrated circuits were cheaper and more familiar to designers than digital circuits, the dual slope ADC was the choice for inexpensive multimeters, anything that didn't require high speed, and especially any problem that looked at noisy signals. Now that microcontrollers with high speed ADCs and facile signal averaging are available, the dual slope system is becoming less common. Nevertheless, when considering measurement of noisy signals, as long as conversion rates of no more than 10 times per second are adequate, this is an approach that is well worth considering. The sigma delta ADC, linked with a digital signal processor or microcontroller, is becoming the chief challenger to the dual slope system.

   
 

 

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